1. Field of Invention
The invention relates to a Reed-Solomon decoder. More particularly, the invention relates to a multi-mode Reed-Solomon decoder based upon the Peterson-Gorenstein-Zierler (PGZ) algorithm.
2. Related Art
The Reed-Solomon (RS) codes have a strong error-correcting ability for burst transmission errors. Therefore, the RS codes have been widely used for error correction in digital communication and storage systems such as the xDSL, the cable modem, between a processor and a memory, the CD and the DVD.
Among various RS decoding algorithms, the Peterson-Gorenstein-Zierler (PGZ) algorithm provides the simplest method for implementing a RS decoder for t≦3. This is a low-cost solution for such systems as the error control code (ECC) between a processor and a memory that requires smaller error-correcting ability. Unlike an iterated RS decoding algorithm, such as the Berlekamp-Massey algorithm, the main drawback of the conventional PGZ algorithm is that it can perform only single mode correction. In other words, the PGZ decoding circuit for t=3 cannot make t=1,2 correction. Therefore, a PGZ decoding circuit for t≦3 conventionally requires three sets of different circuits to compute the t=1, t=2, and t=3 corrections independently, as shown in the circuit block diagram of FIG. 2.
Apparently, implementing three sets of hardware circuits in an IC is a burden for manufacturing cost and chip design. To implement the Reed-Solomon decoder using the conventional PGZ algorithm, individual hardware circuits for different error corrections are required (the number of error correction abilities t=0,1,2,3 . . . ). As the number of error codes increases, the required chip area also grows exponentially. This inevitably increases the manufacturing cost and lowers the efficiency of the hardware utility. In addition, the Reed-Solomon decoder has a finite field inverter (FFI), which occupies a large area and needs a long calculation time. With the increasing error-correcting abilities, the circuit design becomes very complicated. Moreover, the number of required finite field adders (FFA) and finite field multipliers (FFM) grows exponentially.